A cache coherent multiprocessor system contains two or more independent processor cores. These cores contain caches for replicating memory data close to where it will be consumed. A function of the cache coherent protocol is to keep these caches coherent, meaning, to ensure a consistent view of memory.
A cache coherent CMP is a special case of a cache coherent multiprocessor system. In a CMP, the independent processor cores are integrated onto a single piece of silicon. Currently, there is no protocol to ensure cache coherency in a CMP. Thus, a need exists for an on-chip cache coherence protocol maintaining coherency among the on-chip processor caches.